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High dielectric (high-k) materials development has been playing a central role in the Moore’s scaling of CMOS logic starting from the 65 nm technology node where SiO2 revealed its intrinsic limit due to direct tunneling at a physical thickness of about 1 nm, necessary, in bulk CMOS, to address short-channel effects leading to source-drain leakage. High-k dielectrics technology is crucial to CMOS scaling down to the ultimate node. In addition, the maturing material science and technology of high permittivity materials found several other applications in emerging logic and memory devices for classical and quantum information processing within von-Neumann and non Von-Neumann schemes, as well as in other application areas such as spintronics, energy harvesting and production, sensors, and neuroelectronics. This paper focuses on a brief description of the state of the art and future prospects of high-k dielectrics for devices with logic functionalities.
Publication date: 
1 Jan 2018
Biblio References: 
TO-BE COST Action" Towards Oxide-Based Electronics" Sping Meeting 2018